`timescale 1ns / 1ps

module cordic_tb;

    reg 						clk_50m;
    reg 						rst_n;
    reg  			[8:0] 		cnt;
    reg  			[10:0] 		phase;
    wire 	 		[31:0] 		sin;
    wire 	 		[31:0] 		cos;
    wire 	 		[31:0] 		err;

    initial begin
        $dumpfile("output/cordic_tb.vcd");
        $dumpvars(0, cordic_tb);
    end

    cordic 				cordic_inst 
    (
        .clk					(clk_50m	),
        .rst_n					(rst_n		),
        .phase					(phase		),
        .sin					(sin		),
        .cos					(cos		),
        .err					(err  		)
    );

    initial begin
		clk_50m = 0;
		rst_n = 0;
		#1 rst_n = 1;
		#100_000 $stop;
    end 

    always #10 clk_50m = ~clk_50m;

    always @ (posedge clk_50m or negedge rst_n) begin
        if(!rst_n) cnt <= 0;
        else if(cnt < 359) cnt <= cnt + 1;
		  else cnt <= 0;
    end

    //生成相位,phase[10:9]为相位的象限0-3,phase[8:0]为相位的角度值
    always @ (posedge clk_50m or negedge rst_n) begin
        if(!rst_n) phase <= 1'b0;
        else begin
			  if(cnt <= 90)
					phase = cnt; // phase = {2'd0, cnt - 9'd0};
			  else if(cnt > 90 && cnt <= 180)
					phase = {2'd1, cnt - 9'd90};
			  else if(cnt > 180 && cnt <= 270)
					phase = {2'd2, cnt - 9'd180};
			  else if(cnt > 270)
					phase = {2'd3, cnt - 9'd270};
		 end
    end

endmodule

